Dear all,
We currently have one open PhD Positions at Institut Pascal (France). Please find the announcements below:
For the Innovative Training Network (ITN) project ACHIEVE – AdvanCed Hardware/Software components for Integrated/Embedded Vision systEms (H2020-MSCA-ITN-2017), we are looking for one motivated early stage researcher in at least one of these two following scientific domains:
- Design and implementation of programming languages (compilation, formal semantics, models of computation …)
- Synthesis of digital systems (hardware description languages, FPGA architectures…).
The researcher fellow will be hosted at the Institut Pascal (http://www.institutpascal.uca.fr/) in the DREAM research group of Université Clermont-Auvergne (UCA), for a period of 36 months with the aim of obtaining a PhD. The DREAM group is working on hardware and software development of advanced computer vision architectures. It was formed in 2008 and until now we have been lucky to work with five visiting professors/researchers and more than 15 graduate students. The group is performing research in the following areas:
- Design of smart cameras
- Image processing architectures
- Software methods and tools for embedded systems
The PhD training includes a second internship in the company NVIDIA (http://www.nvidia.com), the famous producer of GPU. Nvidia is located in Paris. The new researchers will therefore work as a team with existing researchers. They will also cooperate with the other researchers in the ACHIEVE network and participate in the ACHIEVE’s training program.
Our offer
You will receive a PhD scholarship according to the general conditions at Université Blaise Pascal. Tax-fee scholarship includes full social security coverage (net monthly amount starting at ± 2.300 EUR/month + 250 EUR/month mobility allowance + (if applicable) family allowance of 500 EUR). The initial contract will be for a period of 1 year and will start in the first quarter of 2018; this contract should be extended for a total of 3 years, subject to good performance. You will work at the IP research group. Information about IP can be found on the web: http://dream.ispr-ip.fr
Objectives
The PhD subject focuses on the development of the CAPH High Level Synthesis System (http://caph.univ-bpclermont.fr), which has been developed and used within the group for almost one decade for implementing embedded vision applications of reconfigurable architectures such as FPGAs. Starting from a high-level formulation as a data-flow graph, CAPH generates RT-level, synthesis-ready VHDL code. In the current version, the generated RTL descriptions are typically fine grain, each actor being implemented as a FSM+datapath micro-architecture. For some applications, especially in the embedded vision field, it would be interesting to implement as sequential, imperative code running on soft or hard-core processors (either on the FPGA itself or on a on-chip micro-processor). This would allow the definition the actor behavior using classical, sequential programming languages such as C or C++, reuse of existing sequential code and use of the CAPH system in coarse grain reconfiguration (CGR) frameworks. The proposed work therefore aims at extending the CAPH language with adequate concepts and constructs on the one hand – building on platform-agnostic capabilities of the underlying dataflow model of computation -, and implementing, in the most portable and efficient way as possible, these extensions in the compilation and synthesis flow on the other hand. Validation will be carried out on carefully selected, realistic, embedded vision applications.
Profile of the candidate
You have a Master of Science degree (at the start of the PhD) and a strong background in Computer Science. Candidates with an MsC in another discipline but with good skills in programming languages, signal/image processing may also be considered.
You have a strong interest in image processing, embedded systems for computer vision, a good knowledge of mathematics, signal or image processing, and very good programming skills. As stated in the preamble, you must have a working experience in digital system design (VHDL) and/or programming language implementation (C, C++, Caml).
You function well in a team. You have good or excellent English and scientific writing skills. You combine a strong interest in scientific research with a desire to see your work applied in industry. Due to EC funding rules, only candidates with less than 4 years of research experience can be considered. Candidates may not have carried out their main activity (work-studies …) in France for more than 12 months in the past 3 years. Université Clermont Auvergne implements gender-neutral recruitment and selection procedures. Female candidates are especially encouraged to apply.
How to apply
Please submit your application by email to both Prof. Francois BERRY at francois.berry@uca.fr and Jocelyn SEROT at Jocelyn.serot@uca.fr
In your email, please include the following:
- A brief motivation of your application: what do you consider the best facts in your CV, which demonstrate your academic excellence in BsC and/or Msc. education? What are your reasons to pursue a PhD? Why would you like to work at Université Clermont-Auvergne? …
- A detailed CV, describing your earlier experience and studies;
- A list of publications (if available);
- A transcript of your educational record (list of courses per year, number of obtained credits, obtained marks) if available. This need not be official document at this stage ;
- A (rough) indication or estimate of your rank among other students (e.g., top 10% among 35 students in my master);
- If available: 1-3 English language documents describing your earlier research (e.g., scientific papers, master thesis, report on project work, etc.). These documents need not be on the topic of the positions.